Having trained students in over 350+ Engineering Colleges across India, we at Geekslab Technologies are one of the biggest Training Service providers of the nation.

Geekslab provides state of the art training on VLSI with curriculum customized to requirent of the Industry.

At Geekslab, we believe that practical knowledge leads to a deeper understanding of a concept through the act of doing and personal experience. We ensure that you absorb the skill and knowledge by working on real world projects and geting your hands diry; giving you an profound insight of the domain in the process.

Key Features :

  • Learn opensource EDA tools, like Opentimer, and help in contributing towards the development of this tool
  • Understanding Modules and Ports, Logic Synthesis with Verilog HDL and Advanced Verification Techniques

Course Content :

1. Introduction to VLSI

2. Digital System Design

3. Introduction to HDL

4. Basic Concepts

5. Gate Level Modeling

6. Dataflow Modeling

7. Behavioral Modeling

8. Tasks and Functions

9. State Machines

10. System Verilog Overview

11. Data Types

12. Flow Control

13. OOP in System Verilog

14. Advanced Concepts

15. Interfaces

16. Process Synchronization

17. Program Blocks

18. Functional Coverage

19. System Verilog Assertions

20. Universal Verification Methodology

21. Stimulus Modeling

22. UVM Simulation Phases

23. Creating a Simple Environment

24. Test Classes

25. Configurations

26. UVM Sequences

27. Multi-Channel Sequences and Scoreboards

28. Transaction Level Modeling (TLM)

29. Register Layer

30. System Verilog and UVM Based Verification IP Project

Each of the above module contains sub-modules, for complete course details contact us !

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